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Year
No
Publication Name
2012
18
M. Mativenga, J. K. Um, D. H. Kang, R. K. Mruthyunjaya, J. H. Chang, G. N. Heiler, T. J. Tredwell, and J. Jang, “Edge effects in bottom-gate inverted staggered thin-film transistors,” IEEE Trans Electron Devices, 59, 9, 2501, September (2012).
2012
17
M. Mativenga, D. H. Kang, U. G. Lee, J. Jang, “Study of mechanism of stress-induced threshold voltage shift and recovery in top-gate amorphous-InGaZnO4 thin-film transistors with source-and drain-offsets,” Solid State Commun., 152, 18, 1739, September
2012
16
J. G. Um, M. Mativenga, P. Migliorato, and J. Jang, "Increase of interface and bulk density of states in amorphous-indium-gallium-zinc-oxide thin-film transistors with negative-bias-under-illumination-stress", Appl. Phys. Lett., 101, 113504, September (
2012
15
D. Geng, D. H. Kang, M. J. Seok, M. Mativenga, and J. Jang, “High-Speed and Low-Voltage-Driven Shift Register with Self-Aligned Coplanar a-IGZO TFTs,” IEEE Electron Device Lett., 33, 7, 1012, July (2012).
2012
14
S. H. Ryu, Y. C. Park, M. Mativenga, D. H. Kang, and J. Jang., “Amorphous-InGaZnO4 Thin-Film Transistors with Damage-Free Back Channel Wet-Etch Process,” ECS Solid State Lett., 1, 2, Q17, July (2012).
2012
13
M. Mativenga, T.-H. Hwang, and J. Jang, “Bias-induced migration of ionized donors in amorphous oxide semiconductor thin-film transistors with full bottom-gate and partial top-gate structures,” AIP Advances, 2, 3, 032129, July (2012).
2012
12
H. Jeong, M. Mativenga, S. G. Lee, Y. M. Ha, J. Jang, “Design of a low-power-consumption a-IGZO TFT-based Vcom driver circuit with long-term reliability,” Journal of the Society for Information Display, 19, 11, 825, June (2012).
2012
11
U. G. Lee, M. Mativenga, D. H. Kang, and J. Jang, “A Three-Mask-Processed Coplanar a-IGZO TFT With Source and Drain Offsets,” IEEE Electron Device Lett., 33, 6, 812 June (2012).
2012
10
M. Mativenga, D. Geng, J. H. Chang, T. J. Tredwell, and J. Jang, “Performance of 5-nm a-IGZO TFTs with various channel lengths and an etch stopper manufactured by back UV exposure,” IEEE Electron Device Lett., 33, 6, 824, June (2012).
2011
9
M. Mativenga, M. Seok, and J. Jang, “Gate bias-stress induced hump-effect in transfer characteristics of amorphous-indium-galium-zinc-oxide thin-fim transistors with various channel widths,” Appl. Phys. Lett. 99, 122107, September (2011).
2011
8
M. J. Seok, M. H. Choi, M. Mativenga, D. Geng, D. Y. Kim, and J. Jang, “A Full-Swing a-IGZO TFT-Based Inverter with a Top-Gate-Bias-Induced Depletion Load,” IEEE Electron Device Lett. 32, 8, 1089, August (2011).
2011
7
M. Mativenga, M. H. Choi, J. Jang, R. Mruthyunjaya, T. J. Tredwell, E. Mozdy, and C. Kosik-Williams, “Degradation Model of Self-Heating Effects in Silicon-on-Glass TFTs,” IEEE Trans. Electron Devices 58, 8, 2440, August (2011).
2011
6
M. Mativenga, M. H. Choi, D. H. Kang, and J. Jang, “High-Performance Drain-Offset a-IGZO Thin-Film Transistors,” IEEE Electron Device Lett., 32, 5, 644, May (2011).
2011
5
M. Mativenga, M. H. Choi, W. Choi, J. W. Choi, J. Jang, R. Mruthyunjaya, T. J. Tredwell, E. Mozdy, and C. Kosik-Williams, “Reduction of Hot Carrier Effects in Silicon-on-Glass TFTs,” J. Electrochem. Soc., 158, 6, J169, April (2011).
2011
4
M. Mativenga, J. W. Choi, J. H. Hur, H. J. Kim and J. Jang, “Highly stable amorphous indium–gallium–zinc-oxide thin-film transistor using an etch-stopper and a via-hole structure,” Journal of Information Display, 12, 1, 47, March (2011).
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